000 nam a22 7a 4500
999 _c62670
_d62670
003 FUTML
005 20170512100940.0
006 ta
008 040225s2009 ii au pgr 0 1 0eng
020 _a9789350142530
037 _aB-34389
040 _aFUTML
_bENG
_cFUTML
050 0 0 _aQA166.25.M36
_b.M36 2009
100 _aManhas, Pratima
_917305
130 0 _aVLSI design (Online)
_917306
245 1 0 _aVLSI design.
_cBy Pratima Manhas and Shaveta Thakral
260 _aNew Delhi :
_bS.K. Kataria and Sons,
_cc2009.
300 _a462p.:
_bill.;
_c24cm.
504 _aInclude index
515 _aArticles added intermittently throughout the year, grouped by year.
515 _aVol. 15 (2002) succeeded by vol. 2007.
538 _aMode of access: World Wide Web.
590 _aB-34389/DORA120517
650 0 _aIntegrated circuits
_xVery large scale integration
_vPeriodicals.
_917307
650 6 _aCircuits int�egr�es �a tr�es grande �echelle.
_917308
650 7 _aIntegrated circuits
_xVery large scale integration.
_2fast
_0(OCoLC)fst00975602
_92557
655 7 _aPeriodicals.
_2fast
_0(OCoLC)fst01411641
_91190
700 _aTharkra, Shaveta
_917309
776 0 8 _iPrint version:
_tVLSI design
_x1065-514X
_w(DLC)sn 92002288
_w(OCoLC)26621523
912 _aDORA
_bDORA
_cLADAN DOGARA
942 _2lcc
_cBKS
949 _aIBB LIBRARY G K
_cQA166.25.M36
_d.M39 2009
_g2342114874
_nnc-1