000			nam a22 7a 4500
999			_c58811 _d58811
001			13642215
003			FUTML
005			20170412091035.0
007			ta
008			170412s2005 enka grb 001 0 eng
010			_a 2004054515
020			_a052182866X (alk. paper)
037			_aB-29439
040			_aDLC _cFUTML
042			_apcc
050	0	0	_aTK7885.7 _b.L55 2005
082	0	0	_222
100	1		_aLilja, D.J. _98790
245	1	0	_aDesigning digital computing systems with Verilog / _cDavid J. Lilja and Sachin S. Sapatnekar. _hprint resources
260			_aCambridge ; _aNew York : _bCambridge University Press, _cc2005.
300			_aix, 160 p. : _bill. ; _c25 cm.
504			_aIncludes bibliographical references and index.
590			_aB-29439/KINTA/12/04/17
650		0	_aVerilog (Computer hardware description language) _96379
650		0	_aElectronic digital computers _xDesign and construction. _98791
700	1		_aSapatnekar, S.S., _d1967- _98792
856	4	1	_3Table of contents _uhttp://www.loc.gov/catdir/toc/cam051/2004054515.html
856	4	2	_3Publisher description _uhttp://www.loc.gov/catdir/description/cam051/2004054515.html
856	4	2	_3Contributor biographical information _uhttp://www.loc.gov/catdir/enhancements/fy0732/2004054515-b.html
906			_a7 _bcbc _corignew _d1 _eocip _f20 _gy-gencatlg
912			_aKINTA _bKINTA _cSABA
942			_2lcc _cBKS
949			_aIBB LIBRARY GIDAN KWANO _cTK7885.7 _d.L55 _nNC1